Beschreibung
* Define roadmaps and strategies for FPGA validation and softwaresupport
* Providing FPGAs for software development and hardware verification
* Porting hardware designs from Verilog HDL to an FPGA
implementation. Perform synthesis timing
closure to meet performance requirements
* Interfacing between front end hardware design teams and software teams to debug designs and ensure correct FPGA implementation and
functionality with software tool
* Finding solutions for modelling non-digital components to FPGA
* Testing/sign-off of FPGA before delivery to customer
* Familiar with CPU-based SoC, bus protocols
* System Verilog encoding
* Quality checks, CDC, linting
* Cadence tools for design and verification
* Experience with direct digital synthesis
* Documentation
Kontaktperson: Account Manager Mr. Conrad Ruhe
FERCHAU GmbH
Niederlassung Hamburg IT
Nagelsweg 33-35
20097 Hamburg