PCIe Subsystem Design engineer

Vertragsart:
Vor Ort
Start:
ASAP
Dauer:
6 months+
Von:
Roc Search Limited
Ort:
Bayern
Eingestellt:
17.09.2016
Land:
flag_no Deutschland
Projekt-ID:
1204814

Warning
Dieses Projekt ist archiviert und leider nicht (mehr) aktiv.
Sie finden vakante Projekte hier in unserer Projektbörse.

Roc Search's Client is currently recruiting for a PCIe Subsystem Design engineer in Munich on initial 6 month contract.

Job Specs
-Digital design with at least 8 year experience
-Generate CTRL/Subsystem and integrate it with the PHY
-Apply custom logic needed for SoC
-Experience with Low power design(multi-clock, multi-voltage, LP modes, UPF)
-Integrate the design into Intel design flow
-Spyglass analysis, Synthesis and timing check
-Support verification eng and SoC
-Ensure Intel delivery quality checks as per defined checklist
-Protocol familiarity: PCIe needed
-Proactive planning, communication and follow-up skills

Type of role: Contract
Duration: 6 months+
Rate: 40-45 EUR/hr

If this role is of interest, please apply immediately to Stuart Chappell at Roc Search.

As a professional company we gladly welcome applications from persons of any age and background and do not intend to discriminate with advert text and terminology.