Beschreibung
JOB PURPOSE AND OBJECTIVE:Become a member of a world-class analog design team in providing high performance analog and mixed mode circuits for leading data communications and networking products. Designers have opportunities to design high performance analog circuits. Team members participate in circuit architecture, circuit implementation, design review, layout, and silicon validation.
Job Responsibilities
• Responsible for layout design of a complex high-speed, low-noise mixed-signal IP in 16nm CMOS process
• Hands-on block-level layout design and verification work, top-level IP floor-planning and integration, IC sign-off and tape-out
• Work closely with analogue design team on IP floor-planning, trial layout design and parasitic extraction of critical structures. Propose circuit design changes
• Co-ordinate layout design activities across multiple sites. Delegate block-level layout work when feasible
• Collaborate with CAD, process technology, package design and digital back-end teams
• Document own work and participate in design reviews
• Provide guidance to junior team members
Skill and competencies
• Experience in design of high-speed or RF layout in advanced CMOS processes.
-16nm FinFET experience an advantage.
- High-speed ADC layout design experience an advantage.
• Good understanding of high-speed and low-noise layout design techniques and requirements.
• Experience in top-level integration and tape-outs.
• Knowledge of semiconductor device physics and process technology.
• Communicating effectively with circuit and layout designers.
• Ability to work effectively and efficiently in a team environment