20.03.2025 aktualisiert
100 % verfügbar
IC Design Engineer, ASIC Designer, FPGA Developer, Software engineer
München, Deutschland
Nur Remote
M.Sc. Computer ScienceSkills
C (Programmiersprache)HTMLJavaLispAndroidApache HTTP ServerBarcodeleserBash ShellUNIXC++Protocol StackÜberlastung des NetzwerksDebian LinuxLinuxIC Design
Android, apache, ASIC Design, ASIC, barcode reader, bash, build server, C++, C, Cadence, data logging, Debian, docker, event driven, FPGA, Firmware development, firmware, Gitlab, HP-UX, HTML, Computer Science, instruction set architecture, Integrated development environment, Java, GUIs, Linux, Lisp, Digital design, Matlab, Makefiles, Mentor Graphics, Windows, Modelsim, congestion control, network server, object oriented, Prolog, protocol stack, network stack, SuSE, signal processing, Simulink, software development, Version control systems, System Programming, TCL, transistors, Unix, VHDL, Verilog
Erfahrung
Berufserfahrungmehr als 10 Jahre
Freelancer seit2011
Sprachen
ChinesischGrundkenntnisseDeutschMutterspracheEnglischverhandlungssicherFranzösischgut
Projekthistorie
My own startup to develop a next generation protocol stack, and uses the technology developed there to support customers that have various projects. The project involves:
- a full network stack including cryptography, flow/congestion control and presentation layer on top
- Modernizing Gforth and the Forth language to be fit for such a task
- Designing and implementing a GUI framework (called MINOS2) which is fit for the task, fast and portable
- Operating automatic test and build server with Gitlab EE
- Building for docker, snap, flatpak, Android, Debian and SuSE
Dialog aquired power management design team
Senior Design Engineer:
Gasgauge: Firmware development: rewrote smart battery firmware algorithm to b16.
2010/2- Adapted algorithm for battery aging.
2011/9 Concept for fast battery characterization.
Software: Debugger GUI and demonstration/data logging GUI, characterization data
evaluation, validation tools.
Digital design: integration into test chip.
Diodes aquired Zetex PLC
IC Design Engineer:
Gasgauge: Digital design: Integration of b16 CPU, I²C interface, RAM, ROM, SPI for
debugging, work on 10 bit ADC, debugger interface for software development and
2008/7- demonstration GUI (1 year)
2010/2 Charger: Intersil 9221/Maxim 8601 clone, analog design: Comparator blocks, power
transistors (including layout and device engineering), architecture, and voltage mode
regulator (1 year)
Administration of the Munich Linux network
Zetex aquired Mikron AG
IC Design Engineer:
Direct digital feedback amplifier ( DDFA ): Project leader of the modulator part. Digital
2005/4- design of I²S input, equalizer DSP, upsampling DSP, volume control; conversion from
2008/7 FPGA tool-based output stage. Implementation of a GUI to operate the device and design
filters (3 years).
Senior Design Engineer:
Gasgauge: Firmware development: rewrote smart battery firmware algorithm to b16.
2010/2- Adapted algorithm for battery aging.
2011/9 Concept for fast battery characterization.
Software: Debugger GUI and demonstration/data logging GUI, characterization data
evaluation, validation tools.
Digital design: integration into test chip.
Diodes aquired Zetex PLC
IC Design Engineer:
Gasgauge: Digital design: Integration of b16 CPU, I²C interface, RAM, ROM, SPI for
debugging, work on 10 bit ADC, debugger interface for software development and
2008/7- demonstration GUI (1 year)
2010/2 Charger: Intersil 9221/Maxim 8601 clone, analog design: Comparator blocks, power
transistors (including layout and device engineering), architecture, and voltage mode
regulator (1 year)
Administration of the Munich Linux network
Zetex aquired Mikron AG
IC Design Engineer:
Direct digital feedback amplifier ( DDFA ): Project leader of the modulator part. Digital
2005/4- design of I²S input, equalizer DSP, upsampling DSP, volume control; conversion from
2008/7 FPGA tool-based output stage. Implementation of a GUI to operate the device and design
filters (3 years).
Administration of the Munich Linux network
Mikron AG
IC Design Engineer:
Smart Battery Fuel Gauge, third generation: Developed software simulator to develop and
debug firmware, participated in firmware development, debugging and prototype
evaluation (1 year)
Smart Battery Charger: Software simulator and firmware development, participated in
SMBus interface development (half a year), redesign of digital part (new timer and
1998/10- watchdog, debugged SMBus) for second release (1/2 year)
2005/4 Smart Battery Fuel Gauge, fourth generation: Software simulator, technical project leader.
Integration and debugging of digital part, evaluation and test development (1.5 years).
Acoustic Touch Screen Controller (IntelliTouch): Project leader, digital design (integration
of Inventra USB and 8051, flash and SRAM), specification, analog supervision (analog
part comprises two PLLs, amplification, bandpass filter, pipelined ADC) (2 years).
Laser barcode reader: Project leader, digital design (integration of b16, RAM, ROM, and
SPI interface) (2 years, continued at Zetex)
From 2005 also administration of the Unix/Linux network
Mixed Mode ASIC Design
Mikron AG
IC Design Engineer:
Smart Battery Fuel Gauge, third generation: Developed software simulator to develop and
debug firmware, participated in firmware development, debugging and prototype
evaluation (1 year)
Smart Battery Charger: Software simulator and firmware development, participated in
SMBus interface development (half a year), redesign of digital part (new timer and
1998/10- watchdog, debugged SMBus) for second release (1/2 year)
2005/4 Smart Battery Fuel Gauge, fourth generation: Software simulator, technical project leader.
Integration and debugging of digital part, evaluation and test development (1.5 years).
Acoustic Touch Screen Controller (IntelliTouch): Project leader, digital design (integration
of Inventra USB and 8051, flash and SRAM), specification, analog supervision (analog
part comprises two PLLs, amplification, bandpass filter, pipelined ADC) (2 years).
Laser barcode reader: Project leader, digital design (integration of b16, RAM, ROM, and
SPI interface) (2 years, continued at Zetex)
From 2005 also administration of the Unix/Linux network
Mixed Mode ASIC Design