Senior R&D Software Engineer - Post Silicon Validation
Advantest Europe GmbH
Schlagwörter
Skills
Agile Software Development, Embedded Systems, Firmware Development, Low, Device Drivers, Wireless Communication, LTE, 5G NR, RTOS ThreadX, Programming, C, C++, Java, Object Oriented Programming, Python, MATLAB, Eclipse, MS Visual Studio, Jira, Git, Clearcase, Gerrit, Jenkins, CMake, GMake, functional testing, APIs, Interfaces, low latency, Interface, debugging, 2G, power optimization, software architecture, Continuous Integration, Firmware, SystemC, C/C++, linker scripts, algorithms, Modem
Projekthistorie
04/2020
-
02/2022
Advantest Europe GmbH, Duisburg
- Design and Development of APIs, Component SW for control of HW Interfaces
within agile software development process
- Test and validation of SW on Unit, Integration and System level
- XFT lead for designing High Speed and low latency serial and debug Interface
- Design and Development of APIs, Component SW for control of HW Interfaces
within agile software development process
- Test and validation of SW on Unit, Integration and System level
- XFT lead for designing High Speed and low latency serial and debug Interface
12/2018
-
03/2020
Senior Embedded Software Engineer - RF Baseband Driver
Intel Corporation, Communication and Devices Group
Intel Corporation, Communication and Devices Group, Duisburg
- Resource planning, work packages definition, project planning, internal and
external project reporting, integration and branch strategy handling, HW/SW bringup
lead
- Developed and verified current source calibration feature for 4G RF Transceiver
- Resource planning, work packages definition, project planning, internal and
external project reporting, integration and branch strategy handling, HW/SW bringup
lead
- Developed and verified current source calibration feature for 4G RF Transceiver
03/2016
-
11/2018
Senior Embedded Software Engineer - Platform Software
Intel Corporation, Communication and Devices Group
Intel Corporation, Communication and Devices Group, Duisburg
-Track lead for Trace & Debug driver design and development, pre-silicon
verification (unit/module/component testing), SoC bring-up and debugging
- Responsible for system level integration of Trace & Debug driver and customer
delivery with highest quality of service
- Designed and implemented multi-threaded SoC On-Chip Trace Driver for multi-
RAT (2G/3G/4G/5G) and multi core SW/HW tracing
- Designed and implemented innovative multi-buffer-based trace driver for resource
and power optimization, leading to 3x trace load reduction and 2x power
optimization
- Close collaboration with customer and system engineering teams for finalizing
requirements, defining use-cases, software architecture and interfaces
- Successfully deployed PCQGs for Continuous Integration
-Track lead for Trace & Debug driver design and development, pre-silicon
verification (unit/module/component testing), SoC bring-up and debugging
- Responsible for system level integration of Trace & Debug driver and customer
delivery with highest quality of service
- Designed and implemented multi-threaded SoC On-Chip Trace Driver for multi-
RAT (2G/3G/4G/5G) and multi core SW/HW tracing
- Designed and implemented innovative multi-buffer-based trace driver for resource
and power optimization, leading to 3x trace load reduction and 2x power
optimization
- Close collaboration with customer and system engineering teams for finalizing
requirements, defining use-cases, software architecture and interfaces
- Successfully deployed PCQGs for Continuous Integration
10/2012
-
02/2016
LTE Systems Engineer - Firmware Architecture
Intel Corporation, Communication and Devices Group
Intel Corporation, Communication and Devices Group, Duisburg
- Designed, implemented and verified LTE Inner Receiver HW simulator using
SystemC. Successfully integrated the model into host-based virtual prototype for presilicon
verification of LTE firmware
- Designed, implemented scalable, flexible multi-threaded verification framework
using C++ for unit and component testing of LTE firmware modules.
- Designed, implemented LTE firmware ROMing and Patching of C/C++ including
memory-map, linker scripts, build system, pre and post silicon verification
- Designed, implemented and verified LTE Inner Receiver HW simulator using
SystemC. Successfully integrated the model into host-based virtual prototype for presilicon
verification of LTE firmware
- Designed, implemented scalable, flexible multi-threaded verification framework
using C++ for unit and component testing of LTE firmware modules.
- Designed, implemented LTE firmware ROMing and Patching of C/C++ including
memory-map, linker scripts, build system, pre and post silicon verification
12/2009
-
03/2012
Student Research Assistant
Technical University Darmstadt/Fraunhofer Institute
Technical University Darmstadt/Fraunhofer Institute, Darmstadt
- Implementation and Simulation of algorithms and interfaces using C++ and Java
- Implementation and Simulation of algorithms and interfaces using C++ and Java
11/2005
-
10/2009
Assistant Manager (Technical)
National Engineering & Scientific Commission
National Engineering & Scientific Commission, Islamabad (Pakistan)
- Management and coordination of customer training. Conducted 6 major training
cycles comprising more than 1000 trainees
- Management and coordination of customer training. Conducted 6 major training
cycles comprising more than 1000 trainees
Reisebereitschaft
Weltweit verfügbar
