AV

Aparna V.T

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Letztes Update: 02.12.2014

Former Intern at PLX Technology, Bangalore

Abschluss: VLSI Design - Masters Degree
Stunden-/Tagessatz: anzeigen
Sprachkenntnisse: englisch (verhandlungssicher)

Skills

Verilog, VHDL, ASIC, SoC, Semiconductors, System Verilog, VMM, RTL design, Functional Verification, Digital Circuit Design, MATLAB, C, C++, C#, Embedded systems, Modelsim

Projekthistorie

PLX Technology
Intern
06.2013 - 05.2014
Verification of the PCI Express Switch Features Using System Verilog (VMM Methodology)



Robert Bosch Engineering and Business Solutions
Software Engineer
05.2010 - 06.2011
Independently handled Application Development in Windows using Visual C# to showcase the use cases for Bosch Sensors.


 

Reisebereitschaft

Verfügbar in den Ländern Vereinigte Arabische Emirate
Available to work remotely from home
Profilbild von Aparna VT Former Intern at PLX Technology, Bangalore aus Dubai Former Intern at PLX Technology, Bangalore
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