Beschreibung
JWA is seeking to engage a CMOS circuit designer for a telecommunication project in Germany.
Successful candidates will have a strong understanding of CMOS devices and experience with SPICE and Nanosimulation. Knowledge of CMOS logic design at cell level is essential.
You will be responsible for schematic based CMOS circuit design and the prototyping of new high speed IP building blocks. Other duties include supporting module architects, setting up STA analysis and working closely with integration teams.
You will also be responsible for circuit analysis(eg Circuit Timing & Power in various PVT corners)
Please contact James Hezelgrave with an up to date version of your CV for more details.
Key Skills: CMOS, STA, PVT, HARDWARE, DEVICES, VHDL, CIRCUIT DESIGN, INTEGRATION, PRIMETIME