Senior Digital Design Engineer - VHDL, Verilog - Germany

DE  ‐ Vor Ort
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Senior Digital Design Engineer - VHDL, Verilog - Germany - Contract

An established consumer electronics company is currently recruiting for an experienced digital design engineer with knowledge of development for both FPGA and ASIC for contract work in Germany

Succesful engineers will be responsible for implementation, documentation and verification of Silicon IP modules as well as the proper integration of the Silicon IP modules into the top-level SoC design.

Essential Experience

  • Strong experience in low power ASIC/SoC design and verification
  • First rate knowledge of VHDL and experience with verification IP
  • Excellent experience with top-level integration and verification of bus architectures, interface IP and ARM microcontrollers
  • Good experience in FPGA-based Real Time verification

December and New Year start dates are available so apply today with an updated CV for more information and to be considered

Start
ab sofort
Dauer
6 Months
Von
Generic Network
Eingestellt
14.11.2011
Projekt-ID:
267974
Vertragsart
Freiberuflich
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