Beschreibung
I am looking for a Hardware Physical Design Engineer to perform the following tasks:
IO Frame generation and validation
Power planning, optimisation, power grid and signal routing.
Design floor planning, analogue and memory macro placement.
Place and route including timing closure.
SPEF/SDF generation.
Signal integrity tests.
Post-synthesis static timing analysis (STA) and post-layout STA.
Physical verification (DRC, ERC, LVS, ANTENNA rules).
Writing, running, optimisation of scripts.
Skills Required:
Experience with the following tools:
- Mandatory: Cadence RTL Compiler, SOC-Encounter/EDIS, ETS, EPS
- CLP, QRC
- Desirable: Mentor Calibre
Experience with MSMV and PSO design flow desirable
Knowledge of Unix or similar operating system
Knowledge of Scripting languages (Tcl, Perl, GNU make)
Knowledge of a version control system, preferably Subversion
HDL knowledge (Verilog/VHDL)
Team player with good English communication skills
Ability to work with people from different cultures
Proactive and autonomous working style
WA Consultants is an Employment Business and an Employment Agency as described within The Conduct of Employment Agencies and Employment Businesses Regulations 2003.