Beschreibung
RTL Designer (m/f/d)
Reference: -en
Start: asap
Duration: 6 MM
Main tasks:
- Development of functional add-on for existing 3rd party IP
- RTL design (verilog)
- Constraint based verification
- Design report and documentation
- Implementation concept and training/supervision by 3rd party
- Add-on function for filtering and selective modification of Ethernet frames
- Ethernet frames streamed through the add-on IP
- Interface to existing IP specified and provided by 3rd party (originator of IP)
Main qualifications
- Experienced in Verilog RTL designer
- Writing verilog code based on functional requirements and architectural concept
- Synthesis/Implementation: Vivado
- Experiences in constraint based verification
- Writing test cases and assessment of testing results
- HDL Simulation: Vivado/Modelsim
- Experience with stream processing of layer 2 Ethernet frames
- Unicast/Multicast/Broadcast traffic
- VLAN tagging / traffic classes distinguished by PCP value
- Filtering and header modification
Main advantages:
- A very renowned company
- Access to a Germany-wide network of 3,000 companies
- A variety of cultural and recreational offers
About us:
Our many years of recruitment experience and specialist knowledge of the engineering job market make us a strong partner for engineers and technicians. We maintain intensive relationships with customers across all industries and so can provide engineering specialists with exciting projects and attractive job opportunities. Whether it's working with an international automotive manufacturer or a regional market leader in mechanical engineering, drawing on your interests and experience, we will find the right job to suit you. Because with us, specialists find their ideal working environment – all completely free of charge. Register with us and reap the benefits of job offers that are both interesting and relevant to your skills and experience.
My contact at Hays:
My contact person:
Nadine Noe
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