Beschreibung
Aufgaben:Currently we are looking for a Senior DFT Engineer.
Your tasks include:
+ Developing, implementing and validating DFT architecture
+ Integrating DFT implementations, verify and review verification coverage
+ Generating, Simulating and Verifying MBIST/BSC and automatic generated test patterns (ATPG) and analyzing and improving coverage
+ Working with test engineers to bring up test patterns on silicon
Projekt-Nr.:
69384Projekttitel:
Senior DFT Engineer (m/w/d)Stellentyp:
freiberuflichEinsatzort:
RemoteStarttermin:
asapDauer:
6 months ++Anforderungen:
+ 5+ years’ experience in digital design and verification
+ Strong fundamental knowledge of DFT techniques include JTAG, ATPG, test pattern translation, logic diagnosis, scan compression, IEEE 1500 Standard, and MBIST, LBIST, BSC
+ Strong Experience trading off test options with product performance and schedule requirements
+ Strong Experience creating and releasing full test programs for device screening
+ Strong Experience with Mentor Graphics and/or Synopsys and/or Cadence DFT tools
+ Working knowledge of Gatelevel simulation with and w/o SDF
+ Working knowledge of hardware description languages (VHDL or Verilog and SystemVerilog)
+ Working knowledge of TCL, python (or another scripting language like Perl)
+ Working knowledge in implementation of MBIST for memories and knowledge of repair schemes, algorithms
+ Strong experience in Hierarchical DFT with Synopsys TMAX
+ Experience with SHS (Synopsys Hierarchical System) Flow
Zusätzliche Informationen:
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