Embedded Software cossultant

Employment History:
Organization:             Intrinsyc Technologies Corp. (www.intrinsyc.com)     Location: Vancouver
Designation:    Embedded Software Engineer                                        Period: July 18– Present                                                                                                      

• Project:  BSP development & SoC bring up for Intrinsyc Hardware development Kits.

• Description: The projects are about development and porting Board Support Package for Hardware development Kits, SoC and SOM bring up, based on Qualcomm and NXP platforms.

 

• Responsibility: Responsible for Embedded software development for SoC and SOM bring up on Qualcomm and NXP platforms. The work includes coding in C on Linux, Automotive Board bring-up and porting of latest Android BSP on Qualcomm platform.

                                   

• Project:  Automation flow development for manufacturing process

• Description: The project is about development of manufacturing automation flow of crystal calibration of Qualcomm Wireless SoCs.

 

• Responsibility: Independently responsible for complete flow of automation including design, development of automation software in C++ and scripting, instrumentation via GPIB interface.

• Achievement: Delivered complete automation product as a single point of contact.

Organization:             NXP Semiconductors (www.nxp.com) via Hays            Location: Eindhoven
Designation:   Hays Contractor-Sr. Digital IC Verification Enggr                   Period: June 17– Dec 17                                                                                                  

• Project:  NXP Semiconductor Automotive ARM-Cortex Microcontroller

• Description: The project is about SoC bringup of NXP ARM-Cortex-M7 based Automotive Switch.

 

• Responsibility: Responsible for from-the-scratch development of C code on ARM-Cortex based Automotive SoC. I developed testcases using C and Assembly, SoC bringup and RTL debug.

Organization:             NXP Semiconductors (www.nxp.com) via Hays          Location: Hamburg
Designation: Hays Contractor-Sr. Hardware Engineer                                Period: July 16–June 17                                                                                                                                                                                                                                                                        

• Project: NXP Semiconductor next generation Security chip

• Description: The project is about SoC verification of NXP Next-G chip.

 

• Responsibility: Responsible for from-the-scratch development of code for block-level verification of Clocking module and integrating it with other modules for the top-level verification. The code is written in SystemVerilog using UVM flow.

 

• Achievement: Developed from-the-scratch verification code for clock tree in short time.

 
Organization:             Ericsson (www.ericsson.com)                                  Location: Bangalore, San Jose
Designation:    Technical Lead-Software                                           Period: June 15 – June 16
                                                                                                                                               

• Project: ASIC SDK development of Network Processor ‘Spider’

• Description: The project is about ASIC SDK development Ericsson multicore NPU ‘Spider’.

• Responsibility: Responsible for leading, designing and developing Embedded framework for Post Silicon Validation of Ericsson next-generation Network Processing Unit in C, C++ on Linux driver.

 

• Achievement:  Designed new digital validation framework from the scratch in short time.

Organization:             HDL Design House (http://www.hdl-dh.com/ )           Location:     Belgrade
Designation:    Consultant-VLSI Designs                                              Period: Mar 15 – June 15
                                                                                                                                                                                     

• Project: SoC Verification of multicore ARM-Cortex SoC

• Description: The project is about SoC verification for the ARM-Cortex R4–based GNSS multicore SoC for Swiss client u-blox (http://www.u-blox.com/ ).

• Responsibility: Responsible for developing C code at the ARM part of SoC verification. I wrote few critical stress tests and standardized them.

• Achievement: Wrote critical testcases and standardized the testcases template.

Organization:             Cisco Systems (www.cisco.com)                                Location: Bangalore
Designation:    Software Engineer IV                                                   Period: Sep 13 – Nov 14
                                                                                                                       
                                                                                                                                   

• Project: Embedded diagnostic Software development for Cisco queuing ASIC

• Description: The project is about embedded diagnostic suite development of Cisco queuing ASIC. Queuing ASIC is responsible for implementing VOQ (Virtual Output Queue) in ASR9k router by buffering Ingress packets in DDR3 memory.

• Responsibility: I was single point of contact for development of diagnostic of Cisco Queuing ASIC. Work includes writing Embedded C code in Linux and QNX environment, Silicon bringup etc.

• Achievement: Completed single-handedly the diagnostic software development of queuing ASIC.

Organization:             Infineon Technologies (www.infineon.com )             Location: Bangalore
Designation:    Senior Verification Engineer                                         Period: May 11- Sep 13
                                                                                                                      
                                                                                                                                   

• Project: Functional Verification of Infineon TriCore Microcontroller

• Description: Infineon Aurix is Automotive microcontroller on TriCore series of product-line. Functional Verification work includes IP and SoC level verification in pre and post-silicon environment. 

• Responsibility: Owner of multiple IP and SoC modules for Pre and Post-Si digital verification of Infineon TriCore Automotive Microcontroller.  Responsible for developing C, Assembly code for post-silicon validation of MultiCAN+ IP, safety related IPs ( ISO26262), Reset, PLL SoC module etc.

• Project: FPGA-based RTL design using Xilinx design flow

• Description: Automation of Silicon Validation through FPGA was a key project in Infineon Microcontroller division. Work includes system-design using FPGA, RTL design and coding on Xilinx Spartan-6 and Vertex-5, board bring-up of the entire FPGA-based system

• Responsibility: Designed the FPGA-based system for automation of Post-Silicon Validation. The work includes designing RTL code using Xilinx flow, developing driver code in C and board bring-up for FPGA-based system. Lead the overall project.

• Project: A Randomized methodology in Communication IP of Post-Silicon validation

• Description: This is an innovative approach for implementing constrained random verification in post-silicon environment using multiple communication modules.

• Responsibility: Responsible for Design and development of C code for randomized methodology for Post-Silicon validation on communication IPs viz., CAN, SPI, I2C, E-Ray of TriCore SoC.

 

• Achievements:

• Proactively took initiative to implement FPGA-based Automation for Post-Silicon validation, which is successfully implemented as one of the strategic projects in VV team of Infineon.
• Published four International papers in a year from Infineon and got rewarded for that.

Organization:             LSI Corporation (www.lsi.com )                               Location: Bangalore, Calcutta
Designation:    Firmware Development Engineer Senior                   Period: Sep 09- May11
                                                                                                                 Jan 07- July07
                                                                                                                                                                       

• Project: Firmware design and development for storage controller

• Description: The project is about Firmware development of LSI external storage controller card.

• Responsibility:  Contributed into firmware development using C++ related to Cache memory, SCSI layer, conversion from SAS to SATA protocol.

I was also responsible for implementing Core Dump POC on VxWorks for LSI storage controller card using C, C++. It involves fast dumping the CPU volatile memory into a non-volatile RPA memory, when the controller is in PANIC. The purpose of Core Dump on VxWorks was to support Offline debug of LSI card and recovery of customer data.

• Achievement: Completed Core Dump POC single-handedly in order to retain customer IBM.

Organization:             SPA Computers (P) Ltd. (www.spacomp.com )        Location: Bangalore
Designation: Senior Software Engineer                                                            Period: July 08 - Sep 09
                   

• Project: End-to-End Embedded Product Development of Automotive ‘Green Box’

• Description: Automobile ‘Green Box’ is a crash-recorder, which is similar to Black-box in Aeroplane. The project is about End-To-End product development for an European client Infomobility ( http://www.infomobility.pr.it/ ). Work includes system design, board development and Firmware development.

• Responsibility: Designed and developed the firmware for the project ‘Green Box’ in C, Assembly. Designed BSP framework, developed custom boot loader in Assembly, firmware for CAN, GSM , I2C, SPI, modules etc. in C code, board bring-up of ‘Green Box’. Responsible for interaction with the vendor Microchip Technology and lead the overall project.

 

• Project: Optimization of Codec on TI DaVinci DSP platform

• Description: The project is optimization of a H.264 Codec on TI DaVinci platform for client Pixtree Inc. The Goal was to increase the FPS of the codec engine.

• Responsibility: Contributed in C optimization and C64x assembly optimization of Code.

• Project: Firmware development on EZ-USB microcontroller

• Description: The project is about developing Firmware on C51-based EZ-USB for Point of Sale printer. It converts serial data to USB data using Cypress EZ-USB chip.

• Responsibility: Coding in C and C51 Assembly for Cypress EZ-USB.

 

• Achievement: Saved huge revenue for the company by achieving deadline for ‘Green Box’ with an extremely tight schedule with less resource.

Organization:             Rebaca Technologies (www.rebaca.com )                  Location: Calcutta
Designation:    Senior Software Engineer                                            Period: Aug07- July 08
                   

• Project: Firmware development for Video Survillance on TI DaVinci platform

• Description: The project is about Firmware development for Video Surveillance System.

• Responsibility: Designed and coded Device Management plane on TI Da-Vinci board using expressDSP framework using C.

• Project: Linux driver development

• Description: The project is about Linux driver development in C for webcam. The project involves customization of GSPCA kernel-driver for webcam and also fix issues with ALSA driver for audio.

• Responsibility: Contributed in coding in C, debugging and bug-fixing.

• Achievement: Redesigned the video firmware efficiently.

Organization:             RS Software (India) Ltd. (www.rssoftware.com )     Location: Calcutta
Designation:    Software Engineer                                                       Period: Oct 03 – Jan 07
                   

• Project: Customer Activity Tracking System

• Description: The project is to design and development of Customer Activity Tracking System (CATS) of Lexmark Printer Driver. It is a software which will fetch all hardware information of the host PC of the customer, where Lexmark Printer is installed.  Work includes assembly programming to get microprocessor information, C, C++ programming for USB host-controller, and other device information of the host PC.

• Responsibility: Team Lead for US client Lexmark International Inc. (www.lexmark.com) and Owner of CATS team of Lexmark Printer Driver. Responsibility includes project planning, design, coding in C, C++, Assembly, code review and Cross-functional interaction.

• Achievement: As the youngest development lead of Lexmark India, built a sustainable team, capable of delivering products with high efficiency.