Profilbild von Thomas Freygang Hardware-, Softwareentwickler und Softwaredesigner (UML) aus Grossaspach

Thomas Freygang

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Letztes Update: 15.02.2024

Hardware-, Softwareentwickler und Softwaredesigner (UML)

Abschluss: Dipl.-Ingenieur
Stunden-/Tagessatz: anzeigen
Sprachkenntnisse: deutsch (Muttersprache) | englisch (gut)

Skills

Training:
  • Texas Instruments European Customer Training Center
    - In-depth Digital Power Supply Workshop (3 Tage)
  • UML-Training mit dem Enterprise Architect (4 Tage)
  • AUTOSAR-CESSAR Training (3 Tage)
  • AUTOSAR 4.2 Training DaVinci bei Vector (5 Tage)
  • Tessy (razorcat) for safety unit and integration tests 

Projekthistorie

01/2019 - 04/2020
Firmware development
LJU Automatisierungstechnik in Potsdam

Robust information carrier for transmitting and receiving via 400 V power current network to control a trolley, respectively crab (Amer.) by cutting off half-waves of power supply

  • Bootloader, RS485 Interface, EEPROM, wave cutting with Renesas RX110
  • Tool: IAR-Compiler, Segger-debugger, oscilloscope, logic analyzer, software design UML with EA 

04/2018 - 11/2018
Hardware development
Sensata (Standortauflösung 8/2018)

Electronic design capture for an armrest to control a CWL (Compact Wheel Loader)

  • Craft and test for the A-Sample
  • Circuit simulation for coasts, EMV and parts availability
  • Tool: OrCAD (PSpice)

01/2017 - 03/2018
Embedded software architecture and design
Murrelektronik

Design of an Event and time-triggered embedded system for PLC signal forwarding to actuators and sensors in large production systems including feedback (SIL3 project)

  • Realtime Safety OS with scheduler synchronization between the 2 x 2 channels
  • UML/SysML design for time-triggered framework and event handling
  • Task and time modelling for the scheduler of IESE tool by Fraunhofer Institute
  • Tool: Enterprise Architect, ISO 61508

07/2016 - 12/2016
Requirement engineering
TTTech

Driver plus comfort assistance system based on time trigger technology

  • Commissioning of samples (4 processor architectures with 3 Operating Systems)
  • Requirement engineering for the reset behaviour of the front-end ARM-processor driven by VxWorks, generating a post-mortem dump
  • Tool: Enterprise Architect, Requirement Engineering using MKS (former: PTC)

06/2015 - 06/2016
Firmware & software development
Fabema

Programming of the safety µ-processor system TI Hercules TMS 570 (ARM Cortex R4)

  • Algorithm development to verify the set of traffic lights from max. 3 independent signal groups for hostility to all other traffic lights of possible 64 signal groups
  • Test, animation, simulation of the algorithm, written in C++ for Cortex R4, through a call - via DLL of this embedded software - by a MVVM C# program made with WPF
  • Communication via SPI to the traffic light heads
  • usage and rework of UML design
  • Tool: IAR, Segger debugger, Enterprise Architect, Visual Studio 2015

11/2014 - 05/2015
Firmware development
U-Shin

Programming safety module for µC HCS12 (freescale) consider ISO 26262

  • Implementation of E2E-Protection for CAN communication for main µController to the auxiliary µC from Renesas (2 * ASIL B == ASIL D)
  • Error injection and detection at ECC-ROM
  • Tool: CanOE, iSystem debugger, Cosmic compiler, Enterprise Architekt

08/2013 - 09/2014
AUTOSAR Firmware development
A.D.C. of Continental

AUTOSAR 4.0.3 to 4.1.2 develop and config SOME/IP Ethernet BAC (BMW AUTOSAR Core)

  • Implementation CCM (check control messages) as AUTOSAR component
  • Tests by BMW tools {DS, DM, FAT, E-Sys} and on the road
  • Tool: CESSAR, MKS, Doors, Lauterbach, WireShark, freescale ‚gold dust‘

01/2012 - 07/2013
Embedded architecture and design and development
IFM

UML modeling of architecture and design for a double DSP system by Piccolo DSP's (TI)

  • Static part by components and ports; dynamic - by modeling of their port behavior
  • acceptance according to DIN ISO 61508 by TÜV Nord for modul specification and architecture
  • Design safety application - program monitoring by means of a dispatcher for every procedure step including the exchange of intermediate calculation results
  • consulting to auxilary µC
  • Tool: Enterprise Architect, Visual Studio 2010, IAR Compiler, Code Composer Studio

04/2011 - 12/2011
Embedded software and hardware development
Lear Corporation

Advance development for a pixel light as a full LED headlight (always fully faded in)

  • Implementation of fading, swivelling, masking of light distributions for 168 single LED’s according to the CAN message
  • Simulation of those headlight behaviours with C++ Forms in Visual Studio
  • Tool: Visual Studio 2010


Serial development for the control unit of (classical) adaptive headlight

  • Memory protection by MPU
  • accuracy analysis of register settings ADC
  • Tool: WindRiver, Vector CAN Tools, Lauterbach Debugger, oscilloscope, Freescale Bolero

06/2010 - 03/2011
AUTOSAR software design
ThyssenKrupp Presta

Electromechanical steering system

  • Low-level design of ASIL-D component for a reliable determination of rotation direction with two sensors based on different physical operating principles
  • Low level design of QM / QS components using activity and flow charts in Rhapsody
  • ComplexDriver design (AUTOSAR 3.1) with eDMA and eTimer of the Leopard
  • Keep records of the BAC (BMW AUTOSAR CORE): shared memory, partitioned RTE, E2E-lib, ASIL D microkernel, proxies of the ASIL-D and QM components
  • Tool: IBM Synergy, Rhapsody (UML), DOORS, freescale MPC5643L

Reisebereitschaft

Verfügbar in den Ländern Deutschland, Österreich und Schweiz
Raum Berlin bevorzugt
Profilbild von Thomas Freygang Hardware-, Softwareentwickler und Softwaredesigner (UML) aus Grossaspach Hardware-, Softwareentwickler und Softwaredesigner (UML)
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