Profilbild von Eyck Jentzsch HW/SW/embedded SW architect and developer aus Neubiberg

Eyck Jentzsch

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Letztes Update: 01.01.2024

HW/SW/embedded SW architect and developer

Firma: MINRES Technologies GmbH
Abschluss: Dipl.-Ing.
Stunden-/Tagessatz: anzeigen
Sprachkenntnisse: deutsch (Muttersprache) | englisch (verhandlungssicher) | russisch (Grundkenntnisse)

Dateianlagen

cv-eyck-jentzsch.pdf

Skills

For work experience please check the CV.
Skills and know how in the following areas:

Programming languages
  • C/C++ (expert/Trainer)
  • Fortran (basic)
  • TCL, Perl, Shell (medium)
  • Java, Groovy (advanced)
  • Python (medium)
  • Matlab/SimuLink (basic)
  • VHDL (medium)
  • (System-)Verilog (basic)
Frameworks & Tools
  • Eclipse (advanced)
  • IntelliJ (medium)
  • OSCI SystemC (advanced)
  • SNPS Virtualizer (medium)
  • OpenCL (medium)
  • Android SDK (medium)
  • Grails (medium)
  • GIT, SVN (advanced)
  • Xilinx Vivado HLS (medium)
  • RTOS: ThreadX (medium)
Operating systems
  • Linux & derivatives
    • x86 (advanced)
    • ARM (medium)
    • Android (medium)
  • Windows (medium)
  • MacOS X (medium)
  • SunOS (basic)

 

Projekthistorie

Reference contacts can be provided upon request.

December 2011 - present
Providing engineering services to customers esp. in the semiconductor industry. Amongst others those have been:
  • Development of embedded software for various parts of cellular (3G/4G) modems and profiling solutions for them as well as support of the embedded software development process
  • Development of parts and support of the development of Virtual Platforms for 3G/4G modems as well as support for the use of VPs in Firmware development
  • Integration of various C/C++ based Instruction set simulators (ISS) into SystemC based Virtual Platforms used for Firmware development
  • Development and Verification of SystemC based transaction level models (TLM) (C/C++, SystemC)
  • Development of third party debugger integration into embedded ISS (C/C++, SystemC)
  • Migration of SystemC/Verilog based bus-functional models to TLM (C/C++, SystemC, Verilog)
  • Integration of EDA tools and engineering tools into company internal design flows e.g. SNPS Virtualizer, Eclipse IDE, Lauterbach T32 and more
  • Format converters e.g. System RDL into Essence (a company internal XML format) (Java, Groovy, Perl)
  • Providing consultancy with respect to architecture, modeling and design of SystemC based systems and subsystems to validate behavior and performance of mobile phone chipsets for UMTS & LTE
  • Performance analysis & improvement of Virtual Platforms with respect to their simulation performance
    Training development and delivery
    • SystemC t& TLM2.0
    • Virtual platform development
    • Advanced C++
      In-House product development
    • Development of high-performance computing tools to be used in synthetic biology utilizing GPU acceleration
    • Development of high-performance instruction set simulators and virtual platforms for SoC validation and embedded software development
November 1998 - January 2011
As part of the Cadence VCAD services group I worked -amongst others- in the following areas mostly being part of or leading a larger team:
  • Development of SystemC based models of communication chips and synthesis of them into gate level net lists using the Cadence tool C2S, verification of the models against C/C++ based reference models (behavioral model to RTL to LEF/DEF)
  • Development and maintenance of an internal management information system (MIS) to allow control and prediction of the operations of the VCAD services group incl. various front-ends
  • Development of high-performance instruction set simulators and further SystemC models of automotive micro controllers for early firmware development and HW/SW co-design (C/C++, SystemC, VHDL, RTL)
  • Supporting customers in the development and verification of semi- and full-custom digital and mixed signal chips in various areas (automotive, wired communication, wireless communication, consumer)

Reisebereitschaft

Verfügbar in den Ländern Deutschland, Österreich und Schweiz
Prefereably a mixture of on-site and remote work, other schemes can be negotiated. Being located near Munich engagements in Bavaria are preffered but not a must. It depends on project topic and work model.
Profilbild von Eyck Jentzsch HW/SW/embedded SW architect and developer aus Neubiberg HW/SW/embedded SW architect and developer
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