Beschreibung
* Experten Entwurfskenntnisse: (SoC-FPGA : IP Architect, Clock domains boundary definition, MM register layout definition, Bus frequency setup for best throughput/timing closure/resource usage, Flow automation through Tcl/Tk or Perl scripting (reusable), System wide packages & helper function development, STA output analysis on system to achieve fastest timing closure in complete design fit)* Optional: Entwurfskenntnisse (System Architect, thorough knowledge of HW/SW interactions, System partition on IP level, Outsourcing opportunities identification, Bottlenecks identification : Timing, Hardware resources, Power, Specifications for testing of specific IP electrical characterisitics, VHDL, SystemVerilog and SystemC)
* SoC-FPGA
* IP Architect,
* Perl scripting
Schlagwörter:
Analogtechnik, Berufserfahrung, Bus-Systeme, Digitaltechnik, Regelungstechnik, Schaltungsentwurf, Signalverarbeitung
Kontaktperson: Manager Contracting IT Frau Katharina Keller
FERCHAU Engineering GmbH
Niederlassung Karlsruhe
Durmersheimer Straße 55
76185 Karlsruhe