Beschreibung
- Digital design verification
- Experience with low power design verification (multi-clock, multi-voltage, LP modes, UPF)
- Vplan creation and review
- Verification setup, TC creation and regression run, debug and enhance TB
- UVM experience
- Ensure Intel delivery quality checks as per defined checklist
- Support Design eng and SoC
- Protocol familiarity: PCIe needed
- Proactive planning, communication and follow-up skills